1. Field of the Invention
The present disclosure includes disclosure which relates to a solid-state image sensor, a method of manufacturing the same, and a camera.
2. Description of the Related Art
Patent literature 1 (Japanese Patent Laid-Open No. 6-209099) discloses the arrangement of a CCD solid-state image sensing element, and a method of manufacturing the same. A solid-state image sensor described in patent literature 1 has an N+-type impurity layer 5 isolated by a P++-type channel stopper layer 8 formed near the surface of a substrate, and an N−-type impurity layer 6 formed under transfer gate electrodes 10 to be adjacent to the N+-type impurity layer 5. In the manufacturing method described in patent literature 1, after the P++-type channel stopper layer 8 is formed near the surface of the substrate, phosphorus ions are implanted, into the region where a plurality of photoelectric converters are to be formed between a pair of transfer gate electrodes 10, at an implantation angle of 15° to form the N−-type impurity layer 6. At this time, phosphorus ions are implanted into the portion below one of the pair of transfer gate electrodes 10. Then, phosphorus ions are implanted, into the region where a plurality of photoelectric converters are formed between a pair of transfer gate electrodes 10, at an implantation angle of 15° to form the N+-type impurity layer 5and N−-type impurity layer 6. At this time, phosphorus ions are implanted into the portion below the other of the pair of transfer gate electrodes 10.
In the solid-state image sensor described in patent literature 1, the N+-type impurity layer 5 is isolated by the P++-type channel stopper layer 8 formed near the surface of the substrate, but the N+-type impurity layer 5 extends across a plurality of photoelectric converters under the P++-type channel stopper layer 8. Therefore, signals may mix between a plurality of photoelectric converters (pixels), thus leading to degradation in resolution and a mixture of colors.